The present invention relates generally to a delay circuit, and more specifically to a delay circuit implemented in CMOS technology.
Delay circuits are used in conjunction with automated test equipment (ATE) to test integrated circuits (ICs). However, ATEs impose unique requirements upon a delay circuit. First, the circuit must be capable of delaying a rather narrow pulse for a significant period of time. Second, the circuit must be capable of maintaining both rising and falling edge accuracy. Third, the circuit must be capable of meeting stringent accuracy and stability requirements over a wide range of pulse frequencies, test patterns, and duty cycles.
CMOS technology is advantageous because of its low cost and low power consumption relative to other technologies such as bipolar. However, past attempts to design a delay circuit utilizing CMOS technology have not been entirely successful because of the variability in the propagation delay which has resulted, with factors such as voltage, temperature, and applied test pattern.
U.S. Pat. Nos. 4,893,036 and 5,521,539 describe differential signal delay circuits which are implemented in bipolar technology. However, these circuits utilize designs which consume excessive power, and also, particularly the circuit described in the foregoing U.S. Pat. No. 4,893,036, provide a fixed delay period that is not easily alterable by a user. Thus, such circuits have not been attractive candidates for implementation in CMOS technology in which the objective is to achieve low power consumption.
Accordingly, it is an object of the subject invention to provide a CMOS delay circuit which has stability, accuracy and noise immunity characteristics that make it suitable for use with ATEs.
Another object is to provide a CMOS delay circuit which provides a programmable delay.
A further object is to provide a differential input, constant current CMOS delay circuit with reduced power consumption compared to the prior art.
Further objects of the invention include utilization of the foregoing objects alone or in combination.
Additional advantages and objects will be set forth in the description which follows, or will be apparent to those of ordinary skill in the art who practice the invention.